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ADM1166
Block Read
In a block read operation, the master device reads a block of
data from a slave device. The start address for a block read must
have been set previously. In the ADM1166, this is done by a
send byte operation to set a RAM address, or a write byte/word
operation to set an EEPROM address. The block read operation
itself consists of a send byte operation that sends a block read
command to the slave, immediately followed by a repeated start
and a read operation that reads out multiple data bytes, as follows:
Error Correction
The ADM1166 provides the option of issuing a packet error correc-
tion (PEC) byte after a write to the RAM, a write to the EEPROM,
a block write to the RAM/EEPROM, or a block read from the
RAM/EEPROM. This option enables the user to verify that the data
received by or sent from the ADM1166 is correct. The PEC byte
is an optional byte sent after the last data byte has been written
to or read from the ADM1166. The protocol is the same as a
block read for Step 1 to Step 12 and then proceeds as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an ACK on SDA.
The master sends a command code that tells the slave
device to expect a block read. The ADM1166 command
code for a block read is 0xFD (1111 1101).
The slave asserts an ACK on SDA.
The master asserts a repeat start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The slave asserts an ACK on SDA.
The ADM1166 sends a byte-count data byte that tells the
master how many data bytes to expect. The ADM1166
always returns 32 data bytes (0x20), which is the maximum
allowed by the SMBus Version 1.1 specification.
The master asserts an ACK on SDA.
The master receives 32 data bytes.
The master asserts an ACK on SDA after each data byte.
The master asserts a stop condition on SDA to end the
transaction.
13. The ADM1166 issues a PEC byte to the master. The master
checks the PEC byte and issues another block read, if the
PEC byte is incorrect.
14. A NACK is generated after the PEC byte to signal the end
of the read.
15. The master asserts a stop condition on SDA to end the
transaction.
Note that the PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
C ( x ) = x 8 + x 2 + x 1 + 1
See the SMBus Version 1.1 specification for details. An example
of a block read with the optional PEC byte is shown in Figure 47.
1
2
3
4
5 6
7
8
9
10
11
12
W A COMMAND 0xFD A S
BYTE A DATA A
S
SLAVE
ADDRESS
(BLOCK READ)
SLAVE
ADDRESS
R A
COUNT 1
13
Figure 46. Block Read from the EEPROM or RAM
DATA
32
A
P
1
2
3
4
5 6
7
8
9
10
11
12
W A COMMAND 0xFD A S
A DATA A
S
SLAVE
ADDRESS
(BLOCK READ)
SLAVE
ADDRESS
R A
BYTE
COUNT
1
13 14 15
DATA
32
A PEC A P
Figure 47. Block Read from the EEPROM or RAM with PEC
Rev. 0 | Page 31 of 32
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